Explain the SIC machine architecture in detail.

Memory:
⦿ Memory consists of 8-bit bytes; any 3 consecutive bytes form a word (24 bits). All addresses on SIC are byte addresses
⦿ Words are addressed by the location of their lowest numbered byte.
⦿ There are total of 32,768 (215) bytes in the computer memory.
Registers:
There are five registers, all of which have special uses. Each register is 24 bits in length. Their mnemonics, numbers and uses are given in the following table.

Mnemonic	Number	Special Use
A	0	Accumulator; used for arithmetic operations
X	1	Index register; used for addressing
L	2	Linkage register; JSUB instruction stores the return address in this register
PC	8	Program counter; contains the address of the next instruction to be fetched for execution.
SW	9	Status word; contains a variety of information, including a Condition Code (CC)

Data Formats:
⦿Integers are stored as 24-bit binary numbers.
⦿2’s complement representation is used for negative values.
⦿characters are stored using their 8-bit ASCII codes.
⦿There is no floating-point hardware on the standard version of SIC.
Instruction Formats: All machine instructions on the standard version of SIC have the 24-bit format:

8	       1	           15
opcode	       x	           Address

Addressing Modes: There are two addressing modes available, indicated by the setting of the x bit in the instruction.

Mode	Indication	Target Address Calculation
Direct	x=0	TA= address
Indexed	x=1	TA= address + (X)

Parentheses are used to indicate the contents of a register or a memory location. For example, (X) represents the contents of register X.
Direct Addressing Mode:

 Example: LDA     TEN		LDA – 00
 opcode	  x	                                 TEN
 0 0 0 0   0 0 0 0	  0	        0 0 1    0 0 0 0    0 0 0 0    0 0 0 0
 Effective Address (EA) = 1000
 Content of the address 1000 is loaded to Accumulator.
 
 

Indexed Addressing Mode:
Example: STCH BUFFER, X

 
 opcode	  x	                          BUFFER
 0 0 0 0   0 1 0 0	  1	        0 0 1    0 0 0 0    0 0 0 0    0 0 0 0

Effective Address (EA) = 1000 + [X] = 1000 + content of the index register X
The Accumulator content, the character is loaded to the Effective address.
Instruction Set:
SIC provides, load and store instructions (LDA, LDX, STA, STX, etc.). Integer arithmetic operations: (ADD, SUB, MUL, DIV, etc.). All arithmetic operations involve register A and a word in memory, with the result being left in the register. Two instructions are provided for subroutine linkage. COMP compares the value in register A with a word in memory, this instruction sets a condition code CC to indicate the result. There are conditional jump instructions: (JLT, JEQ, JGT), these instructions test the setting of CC and jump accordingly. JSUB jumps to the subroutine placing the return address in register L, RSUB returns by jumping to the address contained in register L.
Input and Output:
Input and Output are performed by transferring 1 byte at a time to or from the rightmost 8 bits of register A (accumulator).
The Test Device (TD) instruction tests whether the addressed device is ready to send or receive a byte of data. Read Data (RD), Write Data (WD) are used for reading or writing the data.